- Verilog

8 Bit Booth Multiplier Verilog Code

Verilog Code module BoothMulti(X, Y, Z); input signed [7:0] X, Y; output signed [31:0] Z;        reg signed [31:0] Z;        reg [1:0] temp;        integer i;        reg E1;        reg [7:0] Y1;        always @ (X, Y)        begin        Z = 31’d0;        E1 = 1’d0;       …

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